utc cd4069 cmos ic utc unisonic technologies co. ltd 1 qw-r502-020,a inverter circuits description the utc cd4069 consists of six inverter circuits and is manufactured using complementary mos (cmos) to achieve wide power supply operating range, low power consumption, high noise immunity, and symmetric controlled rise and fall times. all inputs are protected from damage due to static discharge by diode clam ps to vdd and vss. features * wide supply voltage range: 3.0v ~ 15v. * high noise immunity: 0.45 v dd typ. * low power ttl compatibility: fan out of 2 driving 74l or 1 driving 74ls. dip-14 sop-14 pin configuration 1234567 14 13 12 11 10 9 v ss 8 v dd block diagram v dd v in v out vss n p
utc cd4069 cmos ic utc unisonic technologies co. ltd 2 qw-r502-020,a absolute maximum ratings (note 1, note 2) parameter symbol ratings unit dc supply voltage v dd -0.5 ~ +18 v input voltage v in -0.5 ~ v dd +0.5 v storage temperature range ts -65 ~ +150 power dissipation dip-14 sop-14 p d 700 500 mw lead temperature (soldering, 10 seconds) t l 260 recommended operating conditions (note 2) parameter symbol ratings unit dc supply voltage v dd 3 ~ 15 v input voltage v in 0 ~ v dd v operating temperature range t a -40 ~ 85 dc electrical characteristics (note 2, ta=25 , unless otherwise noted.) parameter symbol conditions min typ max unit quiescent device current i dd v dd =5v, v in =v dd or v ss v dd =10v, v in =v dd or v ss v dd =15v, v in =v dd or v ss 1.0 2.0 4.0 a low level output voltage v ol |i o |<1 a v dd =5v v dd =10v v dd =15v 0 0 0 0.05 0.05 0.05 v high level output voltage v oh |i o |<1 a v dd =5v v dd =10v v dd =15v 4.95 9.95 14.95 v low level input voltage v il |i o |<1 a v dd =5v, vo=4.5v v dd =10v, vo=9v v dd =15v, vo=13.5v 1.0 2.0 3.0 v high level input voltage v ih |i o |<1 a v dd =5v, vo=0.5v v dd =10v, vo=1v v dd =15v, vo=1.5v 4.0 8.0 12.0 v low level output current (note 3) i ol v dd =5v, vo=0.4v v dd =10v, vo=0.5v v dd =15v, vo=1.5v 0.44 1.1 3.0 0.88 2.25 8.8 ma high level output current (note 3) i oh v dd =5v, vo=4.6v v dd =10v, vo=9.5v v dd =15v, vo=13.5v -0.44 -1.1 -3.0 -0.88 -2.25 -8.8 ma input current i in v dd =15v, v in =0v v dd =15, v in =15v -10 -5 10 -5 -0.30 0.30 a
utc cd4069 cmos ic utc unisonic technologies co. ltd 3 qw-r502-020,a ac electrical characteristics* (ta=25 , c l =50pf, r l =200k , t r and t f 20 ns, unless otherwise specified) parameter symbol conditions min typ max unit propagation delay time from input to output t phl or t plh v dd =5v v dd =10v v dd =15v 50 30 25 90 60 50 ns transition time t thl or t tlh v dd =5v v dd =10v v dd =15v 80 50 40 150 100 80 ns average input capacitance c in any gate 6 15 pf power dissipation capacitance c pd any gate (note 4) 12 pf *ac parameters are guaranteed by dc correlated testing. note 1: ''absolute maximum ratings'' are those values beyond which the safety of the device cannot be guaranteed. they are not meant to imply that the devices should be operated at these limits. the table of ''recommended operating conditions'' and ''electrical characteristics'' provides conditions for actual device operation. note 2: v ss =0v unless otherwise specified. note 3: i oh and i ol are tested one output at a time. note 4: c pd determines the no load ac power consumption of any cmos device. ac test circuits and switching time waveforms v in v out c l =50pf 90% 50% 10% 90% 50% 10% 90% 50% 10% 90% 50% 10% t r =t f =20ns t thl t tlh t plh t f tr v dd vss v dd v ss output input t phl
utc cd4069 cmos ic utc unisonic technologies co. ltd 4 qw-r502-020,a typical performance characteristics 100 -50 -25 0 60 propagation delay vs ambient temperature ambient temperature ( ) propagation delay (ns) 125 0 c l =15pf c l =50pf v dd =5v see ac test circuit 80 40 20 50 75 100 25 50 -50 -25 0 30 propagation delay vs ambient temperature ambient temperature ( ) propagation delay (ns) 125 0 c l =15pf c l =50pf v dd =10v see ac test circuit 40 20 10 50 75 100 25 150 20 50 50 100 propagation delay time vs load capacitance load capacitance, c l (pf) propagation delay time, t pd (ns) 150 0 t a =+125 see ac test circuit v dd =3v v dd =5v 20 100 v dd =10v v dd =15v 15 0 5.0 5.0 10 10 gate transter characteristcis v in (v) v out (v) 15 0 t a =+125 t a =-55 v dd =10v v dd =5v v dd =15v 10 5 power dissipation vs frequency input frequency (hz) power dissipation per gate ( w) 10 4 10 3 10 2 10 10 3 10 4 10 5 10 6 10 7 c l =15pf v dd =10v c l =50pf v dd =10v ta=+125 power dissipation for other devices is given by p d =(c l +c pd )(v dd ) 2 c l =50pf v dd =5v c l =15pf v dd =5v
utc cd4069 cmos ic utc unisonic technologies co. ltd 5 qw-r502-020,a utc assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all utc products described or contained herein. utc products are not designed for use in life support appliances, devices or systems where malfunction of these products can be reasonably expected to result in personal injury. reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. the information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice.
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